Experience: 5 Years
Job Role
- Develop verification infrastructure and test cases for ASICs focusing on network fabrics, leveraging deep networking expertise.
- Provide technical leadership in verifying complex ASIC designs, ensuring compliance with industry standards and project specifications.
- Collaborate on gate-level simulations, including timing, power analysis, and gate simulations to validate ASIC designs pre tape-out.
- Perform RTL coverage analysis, generate detailed coverage reports, and provide actionable feedback to improve test coverage and effectiveness.
- Maintain high standards of verification quality and proactively drive process improvements to enhance efficiency and verification outcomes.
Key Skills
- Expertise in hardware verification methodologies such as SystemVerilog and UVM.
- Strong understanding of ASIC design and verification flows, including coverage analysis, gate/timing/power simulations, and test-plan documentation.
- Prior experience with Ethernet and PCIe protocols, including serial and parallel VIP verification modes.
- Extensive experience with high-speed SerDes verification.
- Excellent communication skills for clear articulation of complex technical issues and effective coordination across teams.
Application
Please send your CV to hr@nyxses.com